Alliance Memory AS4C16M16SA-7TCN, SDRAM 256Mbit Surface Mount, 166MHz, 3 V to 3.6 V, 54-Pin TSOP
- RS庫存編號:
- 230-8420
- 製造零件編號:
- AS4C16M16SA-7TCN
- 製造商:
- Alliance Memory
可享批量折扣
小計(1 包,共 2 件)*
TWD263.00
(不含稅)
TWD276.16
(含稅)
訂單超過 $1,300.00 免費送貨
有庫存
- 6 件準備從其他地點送貨
**需要更多嗎?**輸入您需要的數量,然後按一下「查看送貨日期」以查詢更多庫存和送貨詳細資訊。
單位 | 每單位 | 每包* |
|---|---|---|
| 2 - 8 | TWD131.50 | TWD263.00 |
| 10 - 18 | TWD128.00 | TWD256.00 |
| 20 - 48 | TWD125.00 | TWD250.00 |
| 50 - 98 | TWD121.00 | TWD242.00 |
| 100 + | TWD118.50 | TWD237.00 |
* 參考價格
- RS庫存編號:
- 230-8420
- 製造零件編號:
- AS4C16M16SA-7TCN
- 製造商:
- Alliance Memory
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Alliance Memory | |
| Memory Size | 256Mbit | |
| SDRAM Class | DDR | |
| Organisation | 16M x 16 | |
| Data Rate | 166MHz | |
| Data Bus Width | 16bit | |
| Address Bus Width | 13bit | |
| Number of Bits per Word | 16bit | |
| Maximum Random Access Time | 5.4ns | |
| Number of Words | 16 M | |
| Mounting Type | Surface Mount | |
| Package Type | TSOP | |
| Pin Count | 54 | |
| Dimensions | 22.35 x 10.29 x 1.2mm | |
| Height | 1.2mm | |
| Length | 22.35mm | |
| Maximum Operating Temperature | +70 °C | |
| Minimum Operating Temperature | 0 °C | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Width | 10.29mm | |
| Minimum Operating Supply Voltage | 3 V | |
| 選取全部 | ||
|---|---|---|
品牌 Alliance Memory | ||
Memory Size 256Mbit | ||
SDRAM Class DDR | ||
Organisation 16M x 16 | ||
Data Rate 166MHz | ||
Data Bus Width 16bit | ||
Address Bus Width 13bit | ||
Number of Bits per Word 16bit | ||
Maximum Random Access Time 5.4ns | ||
Number of Words 16 M | ||
Mounting Type Surface Mount | ||
Package Type TSOP | ||
Pin Count 54 | ||
Dimensions 22.35 x 10.29 x 1.2mm | ||
Height 1.2mm | ||
Length 22.35mm | ||
Maximum Operating Temperature +70 °C | ||
Minimum Operating Temperature 0 °C | ||
Maximum Operating Supply Voltage 3.6 V | ||
Width 10.29mm | ||
Minimum Operating Supply Voltage 3 V | ||
The Alliance Memory 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is internally configured as 4 Banks of 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented
accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.
Fast access time from clock: 5/5.4 ns
Fast clock rate: 166/143 MHz
Fully synchronous operation
Internal pipelined architecture
4M word x 16-bit x 4-bank
Fast clock rate: 166/143 MHz
Fully synchronous operation
Internal pipelined architecture
4M word x 16-bit x 4-bank
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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