Infineon SRAM, S70KL1282GABHV020- 128 MB
- RS庫存編號:
- 273-5437
- 製造零件編號:
- S70KL1282GABHV020
- 製造商:
- Infineon
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- RS庫存編號:
- 273-5437
- 製造零件編號:
- S70KL1282GABHV020
- 製造商:
- Infineon
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Memory Size | 128MB | |
| Product Type | SRAM | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 35ns | |
| Maximum Clock Frequency | 200MHz | |
| Minimum Supply Voltage | 1.8V | |
| Timing Type | DDR | |
| Maximum Supply Voltage | 3V | |
| Package Type | FBGA-24 Ball | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 105°C | |
| Series | HYPERRAM | |
| Standards/Approvals | No | |
| Automotive Standard | AEC-Q100 | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Memory Size 128MB | ||
Product Type SRAM | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 35ns | ||
Maximum Clock Frequency 200MHz | ||
Minimum Supply Voltage 1.8V | ||
Timing Type DDR | ||
Maximum Supply Voltage 3V | ||
Package Type FBGA-24 Ball | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 105°C | ||
Series HYPERRAM | ||
Standards/Approvals No | ||
Automotive Standard AEC-Q100 | ||
The Infineon DRAM is a high speed CMOS self refresh DRAM, with HYPERBUS™ interface. The DRAM array uses dynamic cells that require periodic refresh. Refresh control logic within the device manages the refresh operations on the DRAM array when the memory is not being actively read or written by the HYPERBUS™ interface master. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as though the memory uses static cells that retain data without refresh. Hence, the memory is more accurately described as pseudo static RAM.
HYPERBUS™ interface
200 MHz maximum clock rate
Configurable burst characteristics
Data throughput up to 400 MBps
Bidirectional read write data strobe
Optional DDR centre aligned read strobe