Digilent 410-292 Nexys A7-100T Nexys 4 DDR Artix-7 Development Board

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RS庫存編號:
134-6465
製造零件編號:
410-292 Nexys A7-100T
製造商:
Digilent
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品牌

Digilent

Programmable Logic Technology

FPGA

Kit Classification

Development Board

Kit Name

Nexys 4 DDR Artix-7

Nexys 4 DDR Artix-7 FPGA Trainer Board


The Nexys 4 is an FPGA development board designed for the educational market, featuring Xilinx Artix-7 architecture. The Nexys 4 DDR is compatible with the high-performance Vivado Design Suite as well as the ISE® toolset, which includes ChipScope™ and EDK. WebPACK editions of these toolsets can be downloaded for free from Xilinx. Expanded features are available through purchase of the Design Edition.

Xilinx Artix-7 FPGA (XC7A100T-1CSG324C) Features


• 101440 logic cells in 15850 slices (each slice contains 4 x 6-input LUTs and 8 x flip-flops)

• 4860Kbit Fast Block RAM

• 6 x Clock Management Tiles, each with a phase-locked loop (PLL)

• 240 x DSP slices

• Internal clock speeds exceeding 450MHz

• On-chip Analogue-to-Digital Converter (XADC)

Nexys 4 DDR Board Features


• MT47H64M16HR-25 128MiB DDR2 SDRAM
• S25FL128S 16MiB Quad-SPI Serial Flash memory
• ADXL362 SPI bus 3-axis accelerometer
• ADT7420 I²C bus temperature sensor
• ADMP421 MEMS microphone with PDM output
• Programmable over JTAG, Quad-SPI or USB
• FPGA Programming-Done LED
• 2 x 4-digit 7-segment LED displays
• 16 x User LEDs
• 2 x User RGB LEDs
• 5 x User Pushbuttons
• 16 x User Slide-Switches
• USB-UART Bridge via microUSB socket
• USB-A HID Host socket for mice, keyboards and memory sticks
• 12-bit VGA display output on DE15 connector
• RJ45 socket for 10/100 Ethernet connection
• 3.5mm jack socket for mono audio output
• microSD card slot
• 4 x Standard Pmod™ 2 x 6-pin connectors
• Analogue XADC Pmod™ 2 x 6-pin connector
• Powered from either USB, barrel jack socket or external battery pack

Supplied with

Hardshell plastic case with protective foam, USB cable


An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.

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