Renesas Electronics SRAM, 71V416L10PHGI- 4 MB
- RS庫存編號:
- 262-8977
- 製造零件編號:
- 71V416L10PHGI
- 製造商:
- Renesas Electronics
可享批量折扣
小計(1 件)*
TWD338.00
(不含稅)
TWD354.90
(含稅)
訂單超過 $1,300.00 免費送貨
暫時缺貨
- 從 2026年8月10日 發貨
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單位 | 每單位 |
|---|---|
| 1 - 9 | TWD338.00 |
| 10 - 24 | TWD313.00 |
| 25 - 49 | TWD306.00 |
| 50 - 74 | TWD304.00 |
| 75 + | TWD297.00 |
* 參考價格
- RS庫存編號:
- 262-8977
- 製造零件編號:
- 71V416L10PHGI
- 製造商:
- Renesas Electronics
規格
產品概覽和技術數據資料表
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產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Memory Size | 4MB | |
| Product Type | SRAM | |
| Organisation | 256k x 16 | |
| Number of Words | 256K | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 15ns | |
| Timing Type | Asynchronous | |
| Minimum Supply Voltage | 3.3V | |
| Mount Type | Surface | |
| Maximum Supply Voltage | 3.3V | |
| Minimum Operating Temperature | -40°C | |
| Package Type | SOJ-44 | |
| Pin Count | 48 | |
| Maximum Operating Temperature | 85°C | |
| Width | 10.16 mm | |
| Series | IDT71V416 | |
| Length | 18.41mm | |
| Height | 1mm | |
| Standards/Approvals | JEDEC Center Power/GND pinout | |
| Automotive Standard | No | |
| Supply Current | 180mA | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Memory Size 4MB | ||
Product Type SRAM | ||
Organisation 256k x 16 | ||
Number of Words 256K | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 15ns | ||
Timing Type Asynchronous | ||
Minimum Supply Voltage 3.3V | ||
Mount Type Surface | ||
Maximum Supply Voltage 3.3V | ||
Minimum Operating Temperature -40°C | ||
Package Type SOJ-44 | ||
Pin Count 48 | ||
Maximum Operating Temperature 85°C | ||
Width 10.16 mm | ||
Series IDT71V416 | ||
Length 18.41mm | ||
Height 1mm | ||
Standards/Approvals JEDEC Center Power/GND pinout | ||
Automotive Standard No | ||
Supply Current 180mA | ||
- COO (Country of Origin):
- TW
The Renesas Electronics CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the SRAM are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.
JEDEC centre power / GND pinout for reduced noise.
One chip select plus one output enable pin
Bidirectional data inputs and outputs directly
Low power consumption via chip deselect
Upper and lower byte enable pins
Single 3.3V power supply
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