Nexperia 74HC373D,653 8-Bit D Type Latch, Transparent, 3 State, 20-Pin SO
- RS庫存編號:
- 170-8000
- 製造零件編號:
- 74HC373D,653
- 製造商:
- Nexperia
可享批量折扣
小計（1 卷，共 2000 件）*
TWD19,600.00
(不含稅)
TWD20,580.00
(含稅)
訂單超過 $1,300.00 免費送貨
有庫存
- 加上 6,000 件從 2026年5月25日 起發貨
**需要更多嗎？**輸入您需要的數量，然後按一下「查看送貨日期」以查詢更多庫存和送貨詳細資訊。
單位 | 每單位 | 每卷* |
|---|---|---|
| 2000 - 8000 | TWD9.80 | TWD19,600.00 |
| 10000 + | TWD9.60 | TWD19,200.00 |
* 參考價格
- RS庫存編號:
- 170-8000
- 製造零件編號:
- 74HC373D,653
- 製造商:
- Nexperia
規格
產品概覽和技術數據資料表
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Nexperia | |
| Product Type | D Type Latch | |
| Logic Family | 74HC | |
| Logic Function | D Type | |
| Latch Mode | Transparent | |
| Number of Bits | 8 | |
| Number of Channels | 8 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2V | |
| Package Type | SO | |
| Maximum Supply Voltage | 6V | |
| Pin Count | 20 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Length | 13mm | |
| Height | 2.45mm | |
| Series | 74HC | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Nexperia | ||
Product Type D Type Latch | ||
Logic Family 74HC | ||
Logic Function D Type | ||
Latch Mode Transparent | ||
Number of Bits 8 | ||
Number of Channels 8 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Minimum Supply Voltage 2V | ||
Package Type SO | ||
Maximum Supply Voltage 6V | ||
Pin Count 20 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Length 13mm | ||
Height 2.45mm | ||
Series 74HC | ||
Standards/Approvals No | ||
Automotive Standard No | ||
The 74HC373, 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE.
Mixed 5 V and 3.3 V applications
Save board space
Low cost interface solutions
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant
Source termination
Low input threshold
CMOS low power
Key applications
Memory controllers
Backplane interfaces
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