可享批量折扣
小計(1 管,共 46 件)*
TWD19,241.80
(不含稅)
TWD20,204.12
(含稅)
庫存資訊目前無法存取 - 請稍後再回來查看
單位 | 每單位 | 每管* |
|---|---|---|
| 46 - 184 | TWD418.30 | TWD19,241.80 |
| 230 + | TWD405.70 | TWD18,662.20 |
* 參考價格
- RS庫存編號:
- 181-8270
- 製造零件編號:
- CY14B101PA-SFXI
- 製造商:
- Infineon
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Memory Size | 1MB | |
| Product Type | SRAM | |
| Organisation | 128K x 8 bit | |
| Number of Words | 128k | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 15ns | |
| Address Bus Width | 8bit | |
| Maximum Clock Frequency | 104MHz | |
| Timing Type | Synchronous | |
| Minimum Supply Voltage | 2.4V | |
| Maximum Supply Voltage | 2.6V | |
| Mount Type | Surface | |
| Minimum Operating Temperature | -40°C | |
| Package Type | SOIC | |
| Maximum Operating Temperature | 85°C | |
| Pin Count | 16 | |
| Width | 7.59 mm | |
| Height | 2.36mm | |
| Length | 10.49mm | |
| Standards/Approvals | No | |
| Series | CY14B101PA | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Memory Size 1MB | ||
Product Type SRAM | ||
Organisation 128K x 8 bit | ||
Number of Words 128k | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 15ns | ||
Address Bus Width 8bit | ||
Maximum Clock Frequency 104MHz | ||
Timing Type Synchronous | ||
Minimum Supply Voltage 2.4V | ||
Maximum Supply Voltage 2.6V | ||
Mount Type Surface | ||
Minimum Operating Temperature -40°C | ||
Package Type SOIC | ||
Maximum Operating Temperature 85°C | ||
Pin Count 16 | ||
Width 7.59 mm | ||
Height 2.36mm | ||
Length 10.49mm | ||
Standards/Approvals No | ||
Series CY14B101PA | ||
Automotive Standard No | ||
The Cypress CY14X101PA combines a 1-Mbit nv SRAM[1] with a full-featured RTC in a monolithic integrated circuit with serial SPI interface. The memory is organized as 128K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation).You can also initiate the STORE and RECALL operations through SPI instruction.
