Toshiba 74VHC573FT 8-Bit Octal D Type Latch, Transparent, 20-Pin TSSOP
- RS庫存編號:
- 171-3409
- 製造零件編號:
- 74VHC573FT
- 製造商:
- Toshiba
此圖片僅供參考,請參閲產品詳細資訊及規格
小計(1 包,共 25 件)*
TWD217.50
(不含稅)
TWD228.50
(含稅)
訂單超過 $1,300.00 免費送貨
有庫存
- 2,125 件準備從其他地點送貨
**需要更多嗎?**輸入您需要的數量,然後按一下「查看送貨日期」以查詢更多庫存和送貨詳細資訊。
單位 | 每單位 | 每包* |
|---|---|---|
| 25 + | TWD8.70 | TWD217.50 |
* 參考價格
- RS庫存編號:
- 171-3409
- 製造零件編號:
- 74VHC573FT
- 製造商:
- Toshiba
規格
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法例與合規
產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Toshiba | |
| Logic Family | 74VHC | |
| Product Type | Octal D Type Latch | |
| Latch Mode | Transparent | |
| Logic Function | D Type | |
| Number of Bits | 8 | |
| Number of Channels | 8 | |
| Polarity | Inverting | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 5.5V | |
| Pin Count | 20 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Series | 74VHC | |
| Length | 6.5mm | |
| Width | 4.4 mm | |
| Height | 1mm | |
| Automotive Standard | AEC-Q100 | |
| 選取全部 | ||
|---|---|---|
品牌 Toshiba | ||
Logic Family 74VHC | ||
Product Type Octal D Type Latch | ||
Latch Mode Transparent | ||
Logic Function D Type | ||
Number of Bits 8 | ||
Number of Channels 8 | ||
Polarity Inverting | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 5.5V | ||
Pin Count 20 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Series 74VHC | ||
Length 6.5mm | ||
Width 4.4 mm | ||
Height 1mm | ||
Automotive Standard AEC-Q100 | ||
The 74VHC573FT is an advanced high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE). When the OE input is high, the eight outputs are in a high impedance state. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages
Wide operating temperature range: Topr = -40 to 125
High speed: fMAX = 180 MHz (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 4.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28% VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V
Low noise: VOLP = 1.0 V (max)
Pin and function compatible with the 74 series
(74AC/HC/AHC/LV etc.) 573 type.
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