Microchip ENC28J60-I/SO, Ethernet Controller, 10Mbps SPI, Serial-SPI, 3.3 V, 28-Pin SOIC

RS庫存編號:: 698-8987
製造零件編號:: ENC28J60-I/SO
製造商:: Microchip

Microchip ENC28J60-I/SO, Ethernet Controller, 10Mbps SPI, Serial-SPI, 3.3 V, 28-Pin SOIC

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RS庫存編號:: 698-8987
製造零件編號:: ENC28J60-I/SO
製造商:: Microchip

規格

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產品詳細資訊

透過選取一個或多個屬性來查找類似產品。

選取全部	屬性	值
	品牌	Microchip
	Physical Network Type	10BaseT
	Host Interface	Serial-SPI
	IC Type	Controller IC
	Network Interface	SPI
	Communication Mode	Full Duplex, Half Duplex
	Data Rate	10 Mbps, 100 Mbps, 1000Mbps
	Standard Supported	IEEE 802.3
	Mounting Type	Surface Mount
	Package Type	SOIC
	Pin Count	28
	DMA Support	Yes
	Typical Operating Supply Voltage	3.3 V
	Dimensions	17.9 x 7.5 x 2.05mm
	Minimum Operating Temperature	-40 °C
	Maximum Operating Temperature	+85 °C

	選取全部
	品牌 Microchip
	Physical Network Type 10BaseT
	Host Interface Serial-SPI
	IC Type Controller IC
	Network Interface SPI
	Communication Mode Full Duplex, Half Duplex
	Data Rate 10 Mbps, 100 Mbps, 1000Mbps
	Standard Supported IEEE 802.3
	Mounting Type Surface Mount
	Package Type SOIC
	Pin Count 28
	DMA Support Yes
	Typical Operating Supply Voltage 3.3 V
	Dimensions 17.9 x 7.5 x 2.05mm
	Minimum Operating Temperature -40 °C
	Maximum Operating Temperature +85 °C

ENC28J60 Datasheet

ECN28J60 10Base-T Ethernet Controllers

The ENC28J60 from Microchip is a great stand-alone ethernet controller. ENC28J60 is a 10BASE-T controller in a small form factor SOIC package with 28 pins. Featuring bandwidth of 10Mbps and onboard MAC & PHY, this controller is great for a range of applications. Microchips ethernet controllers also contain internal DMA for faster memory copying and a max speed of 25Mhz.

Features and Benefits:

10BASE-T

Integrated MAC and PHY

10Mbps bandwidth

IEEE 802.3 compatible

SPI interface with clock speeds up to 25Mhz

Supports MAC Unicast, Multicast and Broadcast packets

PHY loopback mode and programmable outputs

Applications:

Security

Instrumentation

Home control

Building automation

Industrial automation

VoIP

PHY and MAC?

PHY stand for 'Physical layer'. A physical layer is the first layer in an OSI stack. PHY layer will define physical and electrical characteristics of the network.

MAC is the abbreviation for 'Medium Access Control' and is the second layer in the OSI stack. The MAC is responsible for sending and receiving RF frames.

Daughter boards

AC164121 – 667-7899

AC164123 – 667-7902

For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.

Ethernet Communications - Microchip