Renesas Electronics 74FCT3807PYG PLL Clock Driver, 20-Pin 10 SSOP
- RS庫存編號:
- 263-7958
- 製造零件編號:
- 74FCT3807PYG
- 製造商:
- Renesas Electronics
此圖片僅供參考，請參閲產品詳細資訊及規格
可享批量折扣
小計（1 管，共 64 件）*
TWD1,580.80
(不含稅)
TWD1,660.16
(含稅)
添加 64 件 件可免費送貨
有庫存
- 192 件準備從其他地點送貨
**需要更多嗎？**輸入您需要的數量，然後按一下「查看送貨日期」以查詢更多庫存和送貨詳細資訊。
單位 | 每單位 | 每管* |
|---|---|---|
| 64 - 64 | TWD24.70 | TWD1,580.80 |
| 128 + | TWD24.20 | TWD1,548.80 |
* 參考價格
- RS庫存編號:
- 263-7958
- 製造零件編號:
- 74FCT3807PYG
- 製造商:
- Renesas Electronics
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Product Type | PLL Clock Driver | |
| Mount Type | Surface | |
| Package Type | SSOP | |
| Pin Count | 20 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Series | 74FCT3807A | |
| Standards/Approvals | RoHS | |
| Width | 7.6 mm | |
| Length | 12.8mm | |
| Height | 2.34mm | |
| Number of Outputs | 10 | |
| Maximum Output Frequency | 133.33Hz | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Product Type PLL Clock Driver | ||
Mount Type Surface | ||
Package Type SSOP | ||
Pin Count 20 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Series 74FCT3807A | ||
Standards/Approvals RoHS | ||
Width 7.6 mm | ||
Length 12.8mm | ||
Height 2.34mm | ||
Number of Outputs 10 | ||
Maximum Output Frequency 133.33Hz | ||
Automotive Standard No | ||
- COO (Country of Origin):
- MY
The Renesas Electronics clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fan out. The large fan out from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. It offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.
Guaranteed low skew < 500ps
Very low duty cycle distortion < 1.0ns
Very low CMOS power levels
TTL compatible inputs and outputs
Two independent output banks with 3-state control