Renesas Electronics 9DB633AGILF Clock Buffer 28-Pin TSSOP
- RS庫存編號:
- 263-7987
- 製造零件編號:
- 9DB633AGILF
- 製造商:
- Renesas Electronics
可享批量折扣
小計（1 管，共 50 件）*
TWD6,430.00
(不含稅)
TWD6,751.50
(含稅)
訂單超過 $1,300.00 免費送貨
暫時缺貨
- 從 2026年4月06日 發貨
**需要更多嗎？**輸入您需要的數量，然後按一下「查看送貨日期」以查詢更多庫存和送貨詳細資訊。
單位 | 每單位 | 每管* |
|---|---|---|
| 50 - 50 | TWD128.60 | TWD6,430.00 |
| 100 - 200 | TWD126.00 | TWD6,300.00 |
| 250 - 450 | TWD123.50 | TWD6,175.00 |
| 500 - 950 | TWD121.00 | TWD6,050.00 |
| 1000 + | TWD118.60 | TWD5,930.00 |
* 參考價格
- RS庫存編號:
- 263-7987
- 製造零件編號:
- 9DB633AGILF
- 製造商:
- Renesas Electronics
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Number of Elements per Chip | 5 | |
| Maximum Supply Current | 200 μA | |
| Maximum Input Frequency | 110MHz | |
| Mounting Type | Surface Mount | |
| Package Type | TSSOP | |
| Pin Count | 28 | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Number of Elements per Chip 5 | ||
Maximum Supply Current 200 μA | ||
Maximum Input Frequency 110MHz | ||
Mounting Type Surface Mount | ||
Package Type TSSOP | ||
Pin Count 28 | ||
- COO (Country of Origin):
- TW
The Renesas Electronics zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. It is driven by a differential SRC output pair from an IDT main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without spread-spectrum clocking.
SMBus Interface
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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