Alliance Memory SRAM- 4 MB
- RS庫存編號:
- 230-8468
- 製造零件編號:
- AS7C34098A-10TIN
- 製造商:
- Alliance Memory
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可享批量折扣
小計（1 托盤，共 135 件）*
TWD21,937.50
(不含稅)
TWD23,033.70
(含稅)
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- 從 2026年5月04日 發貨
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單位 | 每單位 | 每托盤* |
|---|---|---|
| 135 - 135 | TWD162.50 | TWD21,937.50 |
| 270 - 405 | TWD157.60 | TWD21,276.00 |
| 540 + | TWD152.90 | TWD20,641.50 |
* 參考價格
- RS庫存編號:
- 230-8468
- 製造零件編號:
- AS7C34098A-10TIN
- 製造商:
- Alliance Memory
規格
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產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Alliance Memory | |
| Memory Size | 4MB | |
| Product Type | SRAM | |
| Organisation | 256 k x 16 Bit | |
| Number of Words | 256K | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 55ns | |
| Address Bus Width | 16bit | |
| Timing Type | 10/12/15/20 Ns | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| Mount Type | Surface | |
| Package Type | TSOP-44 | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 44 | |
| Maximum Operating Temperature | 85°C | |
| Series | AS7C34098A | |
| Length | 18.6mm | |
| Height | 1.05mm | |
| Standards/Approvals | JEDEC | |
| Width | 10.26 mm | |
| Supply Current | 8mA | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Alliance Memory | ||
Memory Size 4MB | ||
Product Type SRAM | ||
Organisation 256 k x 16 Bit | ||
Number of Words 256K | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 55ns | ||
Address Bus Width 16bit | ||
Timing Type 10/12/15/20 Ns | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Mount Type Surface | ||
Package Type TSOP-44 | ||
Minimum Operating Temperature -40°C | ||
Pin Count 44 | ||
Maximum Operating Temperature 85°C | ||
Series AS7C34098A | ||
Length 18.6mm | ||
Height 1.05mm | ||
Standards/Approvals JEDEC | ||
Width 10.26 mm | ||
Supply Current 8mA | ||
Automotive Standard No | ||
The Alliance Memory AS7C34098A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words x 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are Ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.
Easy memory expansion with CE, OE inputs
TTL- and CMOS-compatible, three-state I/O
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