Infineon SDRAM 64 MB Surface, 24-Pin 8 bit FBGA-24 Ball
- RS庫存編號:
- 273-7513
- 製造零件編號:
- S27KL0642DPBHI020
- 製造商:
- Infineon
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可享批量折扣
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TWD120.00
(不含稅)
TWD126.00
(含稅)
訂單超過 $1,300.00 免費送貨
有限的庫存
- 3 件準備從其他地點送貨
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單位 | 每單位 |
|---|---|
| 1 - 9 | TWD120.00 |
| 10 - 24 | TWD118.00 |
| 25 - 49 | TWD115.00 |
| 50 - 99 | TWD113.00 |
| 100 + | TWD111.00 |
* 參考價格
- RS庫存編號:
- 273-7513
- 製造零件編號:
- S27KL0642DPBHI020
- 製造商:
- Infineon
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Memory Size | 64MB | |
| Product Type | SDRAM | |
| Data Bus Width | 8bit | |
| Maximum Clock Frequency | 200MHz | |
| Number of Bits per Word | 16 | |
| Mount Type | Surface | |
| Package Type | FBGA-24 Ball | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 24 | |
| Maximum Operating Temperature | 105°C | |
| Standards/Approvals | No | |
| Length | 6mm | |
| Height | 1mm | |
| Series | S27K | |
| Minimum Supply Voltage | 1.8V | |
| Automotive Standard | AEC-Q100 Grade 2 & 3 | |
| Maximum Supply Voltage | 3.6V | |
| Supply Current | 360μA | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Memory Size 64MB | ||
Product Type SDRAM | ||
Data Bus Width 8bit | ||
Maximum Clock Frequency 200MHz | ||
Number of Bits per Word 16 | ||
Mount Type Surface | ||
Package Type FBGA-24 Ball | ||
Minimum Operating Temperature -40°C | ||
Pin Count 24 | ||
Maximum Operating Temperature 105°C | ||
Standards/Approvals No | ||
Length 6mm | ||
Height 1mm | ||
Series S27K | ||
Minimum Supply Voltage 1.8V | ||
Automotive Standard AEC-Q100 Grade 2 & 3 | ||
Maximum Supply Voltage 3.6V | ||
Supply Current 360μA | ||
The Infineon DRAM is a high speed CMOS, self refresh DRAM, with HYPERBUS interface. The DRAM array uses dynamic cells that require periodic refresh. Refresh control logic within the device manages the refresh operations on the DRAM array when the memory is not being actively read or written by the HYPERBUS interface master. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as though the memory uses static cells that retain data without refresh. Hence, the memory is more accurately described as Pseudo Static RAM.
200 MHz maximum clock rate
Data throughput up to 400 MBps
Bidirectional read write data strobe
Automotive AEC Q100 Grade 2 and 3
Optional DDR centre aligned read strobe
DDR transfers data on both edges of the clock
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