Intelligent Memory IM1216SDBATG-6I SDRAM 128 MB Surface, 54-Pin 16 bit FBGA
- RS庫存編號:
- 588-658
- 製造零件編號:
- IM1216SDBATG-6I
- 製造商:
- Intelligent Memory
小計（1 包，共 5 件）*
TWD553.00
(不含稅)
TWD580.65
(含稅)
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單位 | 每單位 | 每包* |
|---|---|---|
| 5 + | TWD110.60 | TWD553.00 |
* 參考價格
- RS庫存編號:
- 588-658
- 製造零件編號:
- IM1216SDBATG-6I
- 製造商:
- Intelligent Memory
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Intelligent Memory | |
| Product Type | SDRAM | |
| Memory Size | 128MB | |
| Organisation | 8M x 16 | |
| Data Bus Width | 16bit | |
| Address Bus Width | 12bit | |
| Maximum Clock Frequency | 200MHz | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 5ns | |
| Number of Words | 8388608 Words | |
| Mount Type | Surface | |
| Package Type | FBGA | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 54 | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | AEC-Q100, RoHS | |
| Length | 20mm | |
| Series | IM1216SDBA | |
| Height | 1.2mm | |
| Width | 8 mm | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 3V | |
| Supply Current | 75mA | |
| Automotive Standard | AEC-Q100 | |
| 選取全部 | ||
|---|---|---|
品牌 Intelligent Memory | ||
Product Type SDRAM | ||
Memory Size 128MB | ||
Organisation 8M x 16 | ||
Data Bus Width 16bit | ||
Address Bus Width 12bit | ||
Maximum Clock Frequency 200MHz | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 5ns | ||
Number of Words 8388608 Words | ||
Mount Type Surface | ||
Package Type FBGA | ||
Minimum Operating Temperature -40°C | ||
Pin Count 54 | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals AEC-Q100, RoHS | ||
Length 20mm | ||
Series IM1216SDBA | ||
Height 1.2mm | ||
Width 8 mm | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 3V | ||
Supply Current 75mA | ||
Automotive Standard AEC-Q100 | ||
- COO (Country of Origin):
- TW
The Intelligent Memory Four bank Synchronous DRAM organized as 4 banks x 2Mbit x 16 . it achieves high speed data transfer rates up to 200 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock.
Multiple burst read with single write operation
Automatic and controlled precharge command
Power down mode
Auto refresh and self refresh
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