Infineon 4 MB 45 ns NVRAM 44-Pin TSOP, CY14B104LA-ZS25XI
- RS庫存編號:
- 194-9072
- 製造零件編號:
- CY14B104LA-ZS25XI
- 製造商:
- Infineon
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- RS庫存編號:
- 194-9072
- 製造零件編號:
- CY14B104LA-ZS25XI
- 製造商:
- Infineon
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Product Type | NVRAM | |
| Memory Size | 4MB | |
| Organisation | 512 k x 8 Bit | |
| Interface Type | Parallel | |
| Data Bus Width | 8bit | |
| Maximum Random Access Time | 45ns | |
| Mount Type | Surface | |
| Package Type | TSOP | |
| Pin Count | 44 | |
| Length | 18.51mm | |
| Standards/Approvals | No | |
| Width | 10.26 mm | |
| Height | 1.04mm | |
| Maximum Operating Temperature | 85°C | |
| Automotive Standard | No | |
| Number of Words | 512K | |
| Minimum Supply Voltage | 2.7V | |
| Supply Current | 70mA | |
| Maximum Supply Voltage | 3.6V | |
| Number of Bits per Word | 8 | |
| Minimum Operating Temperature | -40°C | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Product Type NVRAM | ||
Memory Size 4MB | ||
Organisation 512 k x 8 Bit | ||
Interface Type Parallel | ||
Data Bus Width 8bit | ||
Maximum Random Access Time 45ns | ||
Mount Type Surface | ||
Package Type TSOP | ||
Pin Count 44 | ||
Length 18.51mm | ||
Standards/Approvals No | ||
Width 10.26 mm | ||
Height 1.04mm | ||
Maximum Operating Temperature 85°C | ||
Automotive Standard No | ||
Number of Words 512K | ||
Minimum Supply Voltage 2.7V | ||
Supply Current 70mA | ||
Maximum Supply Voltage 3.6V | ||
Number of Bits per Word 8 | ||
Minimum Operating Temperature -40°C | ||
- COO (Country of Origin):
- PH
The Cypress CY14B104LA/CY14B104NA is a fast static RAM (SRAM), with a non-volatile element in each memory cell. The memory is organized as 512K bytes of 8 bits each or 256K words of 16-bits each. The embedded non-volatile elements incorporate QuantumTrap technology, producing reliable non-volatile memory. The SRAM provides infinite read and write cycles, while independent non-volatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the non-volatile elements (the STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM (the RECALL operation) from the non-volatile memory. Both the STORE and RECALL operations are also available under software control.
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