Toshiba 74VHC20FT, 2 4-Input NAND CMOS Digital Integrated Circuit, 14-Pin TSSOP
- RS庫存編號:
- 171-3421
- 製造零件編號:
- 74VHC20FT
- 製造商:
- Toshiba
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- RS庫存編號:
- 171-3421
- 製造零件編號:
- 74VHC20FT
- 製造商:
- Toshiba
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Toshiba | |
| Logic Function | NAND | |
| Product Type | CMOS Digital Integrated Circuit | |
| Mount Type | Surface | |
| Number of Elements | 2 | |
| Number of Inputs per Gate | 4 | |
| Schmitt Trigger Input | No | |
| Package Type | TSSOP | |
| Pin Count | 14 | |
| Logic Family | 74VHC | |
| Input Type | CMOS, TTL | |
| Maximum Propagation Delay Time @ CL | 13ns | |
| Maximum High Level Output Current | -8mA | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | AEC-Q100 | |
| Length | 5mm | |
| Maximum Supply Voltage | 5.5V | |
| Height | 1mm | |
| Series | 74VHC | |
| Minimum Supply Voltage | 2V | |
| Width | 4.4 mm | |
| Maximum Low Level Output Current | 8mA | |
| Automotive Standard | AEC-Q100 | |
| Output Type | CMOS, Buffer | |
| 選取全部 | ||
|---|---|---|
品牌 Toshiba | ||
Logic Function NAND | ||
Product Type CMOS Digital Integrated Circuit | ||
Mount Type Surface | ||
Number of Elements 2 | ||
Number of Inputs per Gate 4 | ||
Schmitt Trigger Input No | ||
Package Type TSSOP | ||
Pin Count 14 | ||
Logic Family 74VHC | ||
Input Type CMOS, TTL | ||
Maximum Propagation Delay Time @ CL 13ns | ||
Maximum High Level Output Current -8mA | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals AEC-Q100 | ||
Length 5mm | ||
Maximum Supply Voltage 5.5V | ||
Height 1mm | ||
Series 74VHC | ||
Minimum Supply Voltage 2V | ||
Width 4.4 mm | ||
Maximum Low Level Output Current 8mA | ||
Automotive Standard AEC-Q100 | ||
Output Type CMOS, Buffer | ||
The 74VHC20FT is an advanced high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including a buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Wide operating temperature: Topr = -40 to 125
High speed: tpd = 3.3 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28 % VCC (min)
Power down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V
Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 20 type
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