Infineon 32 MB SPI Flash Memory 48-Pin TSOP
- RS庫存編號:
- 273-7547
- 製造零件編號:
- S29JL032J70TFI310
- 製造商:
- Infineon
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小計（1 件）*
TWD134.00
(不含稅)
TWD140.70
(含稅)
訂單超過 $1,300.00 免費送貨
最後的 RS 庫存
- 最終 821 個，準備發貨
單位 | 每單位 |
|---|---|
| 1 - 9 | TWD134.00 |
| 10 - 24 | TWD131.00 |
| 25 - 49 | TWD128.00 |
| 50 - 99 | TWD125.00 |
| 100 + | TWD123.00 |
* 參考價格
- RS庫存編號:
- 273-7547
- 製造零件編號:
- S29JL032J70TFI310
- 製造商:
- Infineon
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Memory Size | 32MB | |
| Product Type | Flash Memory | |
| Interface Type | SPI | |
| Package Type | TSOP | |
| Pin Count | 48 | |
| Maximum Clock Frequency | 133MHz | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 2.7V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | RoHS | |
| Automotive Standard | AEC-Q100 | |
| Maximum Random Access Time | 15ns | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Memory Size 32MB | ||
Product Type Flash Memory | ||
Interface Type SPI | ||
Package Type TSOP | ||
Pin Count 48 | ||
Maximum Clock Frequency 133MHz | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 2.7V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals RoHS | ||
Automotive Standard AEC-Q100 | ||
Maximum Random Access Time 15ns | ||
The Infineon Flash Memory is a 32 Mb, 3.0 volt only flash memory device, organized as 2097152 words of 16 bits each or 4194304 bytes of 8 bits each. Word mode data appears on DQ15 to DQ0 and byte mode data appears on DQ7 to DQ0. The device is designed to be programmed in system with the standard 3.0 volt VCC supply and can also be programmed in standard EPROM programmers. The device is available with an access time of 60 or 70 ns. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.
Hardware reset pin
20 years data retention
Compatible with JEDEC standards
Four bank architectures available
Unlock bypass program command
Simultaneous Read and Write operations
Zero latency between read and write operations
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