Infineon NOR 64 MB SPI Flash Memory 8-Pin WSON, S25FL064LABNFI010
- RS庫存編號:
- 193-8722
- 製造零件編號:
- S25FL064LABNFI010
- 製造商:
- Infineon
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小計(1 包,共 5 件)*
TWD189.00
(不含稅)
TWD198.45
(含稅)
訂單超過 $1,300.00 免費送貨
暫時缺貨
- 從 2026年5月28日 發貨
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單位 | 每單位 | 每包* |
|---|---|---|
| 5 - 120 | TWD37.80 | TWD189.00 |
| 125 - 240 | TWD36.80 | TWD184.00 |
| 245 + | TWD36.20 | TWD181.00 |
* 參考價格
- RS庫存編號:
- 193-8722
- 製造零件編號:
- S25FL064LABNFI010
- 製造商:
- Infineon
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Product Type | Flash Memory | |
| Memory Size | 64MB | |
| Interface Type | SPI | |
| Package Type | WSON | |
| Pin Count | 8 | |
| Organisation | 8M x 8 Bit | |
| Mount Type | Surface | |
| Maximum Clock Frequency | 108MHz | |
| Cell Type | NOR | |
| Minimum Supply Voltage | 2.7V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Width | 6 mm | |
| Height | 0.75mm | |
| Length | 6mm | |
| Number of Bits per Word | 8 | |
| Series | S25FL064L | |
| Maximum Random Access Time | 8ns | |
| Automotive Standard | AEC-Q100 | |
| Number of Words | 8K | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Product Type Flash Memory | ||
Memory Size 64MB | ||
Interface Type SPI | ||
Package Type WSON | ||
Pin Count 8 | ||
Organisation 8M x 8 Bit | ||
Mount Type Surface | ||
Maximum Clock Frequency 108MHz | ||
Cell Type NOR | ||
Minimum Supply Voltage 2.7V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Width 6 mm | ||
Height 0.75mm | ||
Length 6mm | ||
Number of Bits per Word 8 | ||
Series S25FL064L | ||
Maximum Random Access Time 8ns | ||
Automotive Standard AEC-Q100 | ||
Number of Words 8K | ||
The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output(Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.The architecture features a Page Programming Buffer that allows up to 256 bytes to be programmed in one operation and providesindividual 4 KB sector, 32 KB half block sector, 64 KB block sector, or entire chip erase.By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically.The FL-L family products offer high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space, signal connections and power. These memories offer flexibility and performance well beyond ordinary serial flash devices. They are ideal for code shadowing to RAM,executing code directly (XIP) and storing re-programmable data.
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