Renesas Electronics FIFO Memory, 28-Pin PDIP, 7201LA12TPG
- RS庫存編號:
- 262-8979P
- 製造零件編號:
- 7201LA12TPG
- 製造商:
- Renesas Electronics
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可享批量折扣
查看批量定價選項小計 5 件 (以管提供)*
TWD2,055.00
(不含稅)
TWD2,157.75
(含稅)
訂單超過 $1,300.00 免費送貨
最後的 RS 庫存
- 最終 7 個，準備發貨
單位 | 每單位 |
|---|---|
| 5 - 9 | TWD411.00 |
| 10 - 27 | TWD388.00 |
| 28 - 55 | TWD378.00 |
| 56 + | TWD377.00 |
* 參考價格
- RS庫存編號:
- 262-8979P
- 製造零件編號:
- 7201LA12TPG
- 製造商:
- Renesas Electronics
規格
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法例與合規
產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Product Type | FIFO Memory | |
| Organisation | 512 x 9 | |
| Data Bus Width | 9bit | |
| Access Time | 12ns | |
| Mount Type | Surface | |
| Timing Type | Asynchronous | |
| Minimum Supply Voltage | 4.5V | |
| Package Type | PDIP | |
| Pin Count | 28 | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Bus Direction | Bi-Directional | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Series | IDT7201LA | |
| Width | 7.62mm | |
| Length | 34.3mm | |
| Height | 2.79mm | |
| Number of Bits per Word | 9 | |
| Automotive Standard | No | |
| Supply Current | 80mA | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Product Type FIFO Memory | ||
Organisation 512 x 9 | ||
Data Bus Width 9bit | ||
Access Time 12ns | ||
Mount Type Surface | ||
Timing Type Asynchronous | ||
Minimum Supply Voltage 4.5V | ||
Package Type PDIP | ||
Pin Count 28 | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Bus Direction Bi-Directional | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Series IDT7201LA | ||
Width 7.62mm | ||
Length 34.3mm | ||
Height 2.79mm | ||
Number of Bits per Word 9 | ||
Automotive Standard No | ||
Supply Current 80mA | ||
- COO (Country of Origin):
- TH
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Pin and functionally compatible with 720X family
Low power consumption
Ultra high speed 12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Auto-retransmit capability
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