Renesas Electronics 9FGV0441AKILF PLL Clock Generator 4 32-Pin VFQFPN
- RS庫存編號:
- 262-9024
- 製造零件編號:
- 9FGV0441AKILF
- 製造商:
- Renesas Electronics
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TWD264.00
(不含稅)
TWD277.20
(含稅)
訂單超過 $1,300.00 免費送貨
最後的 RS 庫存
- 最終 480 個，準備發貨
單位 | 每單位 | 每包* |
|---|---|---|
| 2 - 8 | TWD132.00 | TWD264.00 |
| 10 - 18 | TWD118.50 | TWD237.00 |
| 20 - 98 | TWD115.00 | TWD230.00 |
| 100 - 198 | TWD97.00 | TWD194.00 |
| 200 + | TWD95.50 | TWD191.00 |
* 參考價格
- RS庫存編號:
- 262-9024
- 製造零件編號:
- 9FGV0441AKILF
- 製造商:
- Renesas Electronics
規格
產品概覽和技術數據資料表
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Product Type | PLL Clock Generator | |
| Mount Type | Surface | |
| Package Type | VFQFPN | |
| Pin Count | 32 | |
| Maximum Input Frequency | 27MHz | |
| Number of Outputs | 4 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | RoHS | |
| Width | 4mm | |
| Height | 1mm | |
| Length | 4mm | |
| Series | 9FGV0441 | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Product Type PLL Clock Generator | ||
Mount Type Surface | ||
Package Type VFQFPN | ||
Pin Count 32 | ||
Maximum Input Frequency 27MHz | ||
Number of Outputs 4 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals RoHS | ||
Width 4mm | ||
Height 1mm | ||
Length 4mm | ||
Series 9FGV0441 | ||
Automotive Standard No | ||
- COO (Country of Origin):
- MY
The Renesas Electronics PCIE GEN123 CLK GEN is an 4-output very low power clock generator for PCIe Gen1–4 applications with integrated output terminations providing Zo = 100Ω. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.
Integrated terminations provide 100Ω differential Zo reduced component count and board space
1.8V operation reduced power consumption
OE pins support DIF power management
LP-HCSL differential clock outputs reduced power and board space
Programmable slew rate for each output allows tuning for various line lengths
Programmable output amplitude allows tuning for various application environments
DIF outputs blocked until PLL is locked clean system start-up
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