Renesas Electronics 23S05E-1HDCGI Clock Buffer 8-Pin SOIC
- RS庫存編號:
- 250-3446
- 製造零件編號:
- 23S05E-1HDCGI
- 製造商:
- Renesas Electronics
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小計（1 包，共 5 件）*
TWD213.00
(不含稅)
TWD223.65
(含稅)
訂單超過 $1,300.00 免費送貨
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- 15 件準備從其他地點送貨
- 加上 195 件從 2026年5月01日 起發貨
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單位 | 每單位 | 每包* |
|---|---|---|
| 5 - 5 | TWD42.60 | TWD213.00 |
| 10 - 20 | TWD38.60 | TWD193.00 |
| 25 - 45 | TWD36.60 | TWD183.00 |
| 50 - 90 | TWD35.80 | TWD179.00 |
| 95 + | TWD35.00 | TWD175.00 |
* 參考價格
- RS庫存編號:
- 250-3446
- 製造零件編號:
- 23S05E-1HDCGI
- 製造商:
- Renesas Electronics
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 200MHz | |
| Mount Type | Surface | |
| Maximum Propagation Delay Time | 350ps | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Number of Outputs | 5 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 4.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 70°C | |
| Standards/Approvals | RoHS | |
| Series | IDT23S05E | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 200MHz | ||
Mount Type Surface | ||
Maximum Propagation Delay Time 350ps | ||
Package Type SOIC | ||
Pin Count 8 | ||
Number of Outputs 5 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 4.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 70°C | ||
Standards/Approvals RoHS | ||
Series IDT23S05E | ||
Automotive Standard No | ||
The Renesas Electronics clock buffer is a high-speed phase-lock loop (PLL) ,designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 200MHz.
The clock buffer is an 8-pin version of the IDT23S09E
The -1H version operates up to 200MHz frequency and has a higher drive than the -1 device
All parts have on-chip PLLs which lock to an input clock on the REF pin
The PLL feedback is on-chip and is obtained from the CLKOUT pad
Operating frequency of 10MHz to 200MHz
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Low jitter of less than 200 ps cycle-to-cycle
No external RC network required
Power down mode
Spread spectrum compatible
Available in SOIC package
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