Renesas Electronics 501MILF Clock Buffer 8-Pin SOIC
- RS庫存編號:
- 217-7826
- 製造零件編號:
- 501MILF
- 製造商:
- Renesas Electronics
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TWD430.00
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TWD451.50
(含稅)
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- 加上 220 件從 2026年2月20日 起發貨
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單位 | 每單位 | 每包* |
|---|---|---|
| 5 - 20 | TWD86.00 | TWD430.00 |
| 25 - 45 | TWD83.60 | TWD418.00 |
| 50 + | TWD83.00 | TWD415.00 |
* 參考價格
- RS庫存編號:
- 217-7826
- 製造零件編號:
- 501MILF
- 製造商:
- Renesas Electronics
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 50MHz | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Number of Outputs | 5 | |
| Minimum Supply Voltage | 3.3V | |
| Maximum Supply Voltage | 5V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Height | 1.75mm | |
| Length | 5mm | |
| Width | 4 mm | |
| Series | 501MILF | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 50MHz | ||
Mount Type Surface | ||
Package Type SOIC | ||
Pin Count 8 | ||
Number of Outputs 5 | ||
Minimum Supply Voltage 3.3V | ||
Maximum Supply Voltage 5V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Height 1.75mm | ||
Length 5mm | ||
Width 4 mm | ||
Series 501MILF | ||
Standards/Approvals No | ||
Automotive Standard No | ||
The Renesas Electronics 501 Loco™ is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz. Stored in the chip's ROM is the ability to generate nine different multiplication factors, allowing one chip to output many common frequencies (see table on page 2). The device also has an output enable pin which tri-states the clock output when the OE pin is taken low.
IDT's lowest cost PLL clock
Zero ppm multiplication error
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 160 MHz
Extremely low jitter of 25 ps (one sigma)
Compatible with all popular CPUs
Duty cycle of 45/55 up to 160 MHz
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