Renesas Electronics Bus Transceiver Rail to Rail Output Swing, 48-Pin
- RS庫存編號:
- 263-7936
- 製造零件編號:
- 74FCT163245CPVG
- 製造商:
- Renesas Electronics
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- RS庫存編號:
- 263-7936
- 製造零件編號:
- 74FCT163245CPVG
- 製造商:
- Renesas Electronics
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Logic Family | 74FCT | |
| Product Type | Bus Transceiver | |
| Logic Function | Transceiver | |
| Minimum Supply Voltage | -0.5V | |
| Pin Count | 48 | |
| Input Level | Or Vcc = 2.7 V to 3.6 V, 3.3V ± 0.3V, Extended Range, Normal Range | |
| Maximum Supply Voltage | 4.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 4.6ns | |
| Output Level | Rail to Rail Output Swing | |
| Maximum High Level Output Current | -110mA | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | MIL-STD-883, Method 3015 | |
| Maximum Low Level Output Current | 200mA | |
| Series | IDT74FCT163245A/C | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Logic Family 74FCT | ||
Product Type Bus Transceiver | ||
Logic Function Transceiver | ||
Minimum Supply Voltage -0.5V | ||
Pin Count 48 | ||
Input Level Or Vcc = 2.7 V to 3.6 V, 3.3V ± 0.3V, Extended Range, Normal Range | ||
Maximum Supply Voltage 4.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 4.6ns | ||
Output Level Rail to Rail Output Swing | ||
Maximum High Level Output Current -110mA | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals MIL-STD-883, Method 3015 | ||
Maximum Low Level Output Current 200mA | ||
Series IDT74FCT163245A/C | ||
Automotive Standard No | ||
- COO (Country of Origin):
- TW
The Renesas Electronics 16-bit transceiver is built using Advanced dual metal CMOS technology. These high-speed, low-power transceivers are Ideal for synchronous communication between two buses. The direction and output enable controls operate these devices as either two independent 8-bit transceivers or one 16-bit transceiver. The direction control pin controls the direction of data flow. The output enable pin overrides the direction control and disables both ports. All inputs are designed with hysteresis for improved noise margin.
High-speed, low-power CMOS replacement for ABT functions
Low input and output leakage ≤ 1μA
Reduced system switching noise
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