Toshiba 74VHCT245AFT Bus Transceiver, 8-Bit Non-Inverting CMOS, TTL, 20-Pin TSSOP
- RS庫存編號:
- 171-3473
- 製造零件編號:
- 74VHCT245AFT
- 製造商:
- Toshiba
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- RS庫存編號:
- 171-3473
- 製造零件編號:
- 74VHCT245AFT
- 製造商:
- Toshiba
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Toshiba | |
| Product Type | Bus Transceiver | |
| Logic Family | 74VHCT | |
| Logic Function | Bus Transceiver | |
| Number of Channels | 8 | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Pin Count | 20 | |
| Minimum Supply Voltage | 4.5V | |
| Input Level | TTL | |
| Maximum Supply Voltage | 5.5V | |
| Maximum Propagation Delay Time @ CL | 8.7ns | |
| Output Level | CMOS, TTL | |
| Minimum Operating Temperature | -40°C | |
| Maximum High Level Output Current | -8mA | |
| Maximum Operating Temperature | 125°C | |
| Series | 74VHCT245 | |
| Standards/Approvals | No | |
| Length | 6.5mm | |
| Maximum Low Level Output Current | 8mA | |
| Height | 1mm | |
| Automotive Standard | AEC-Q100 | |
| Output Type | 3 State | |
| 選取全部 | ||
|---|---|---|
品牌 Toshiba | ||
Product Type Bus Transceiver | ||
Logic Family 74VHCT | ||
Logic Function Bus Transceiver | ||
Number of Channels 8 | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Pin Count 20 | ||
Minimum Supply Voltage 4.5V | ||
Input Level TTL | ||
Maximum Supply Voltage 5.5V | ||
Maximum Propagation Delay Time @ CL 8.7ns | ||
Output Level CMOS, TTL | ||
Minimum Operating Temperature -40°C | ||
Maximum High Level Output Current -8mA | ||
Maximum Operating Temperature 125°C | ||
Series 74VHCT245 | ||
Standards/Approvals No | ||
Length 6.5mm | ||
Maximum Low Level Output Current 8mA | ||
Height 1mm | ||
Automotive Standard AEC-Q100 | ||
Output Type 3 State | ||
The 74VHCT245AFT is an advanced high speed CMOS OCTAL BUS TRANSCEIVER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It is intended for two-way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input (G) can be used to disable the device so that the busses are effectively isolated. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 V to 5.5 V can be applied to the input and output (Note) (Note) (Note) (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, etc
Wide operating temperature range: Topr = -40 to 125
High speed: tpd = 4.9 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Compatible with TTL inputs : VIL = 0.8 V (max): VIH = 2.0 V (min)
Power down protection is provided on all inputs and outputs.
Balanced propagation delays: tPLH ≈ tPHL
Low noise: VOLP = 1.0 V (max)
Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 245 type
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