Renesas Electronics ISL33001IUZ, 2-Channel Buffer, 8-Pin MSOP
- RS庫存編號:
- 264-0626
- 製造零件編號:
- ISL33001IUZ
- 製造商:
- Renesas Electronics
此圖片僅供參考,請參閲產品詳細資訊及規格
可享批量折扣
小計(1 管,共 50 件)*
TWD2,535.00
(不含稅)
TWD2,662.00
(含稅)
訂單超過 $1,300.00 免費送貨
有庫存
- 1,850 件準備從其他地點送貨
**需要更多嗎?**輸入您需要的數量,然後按一下「查看送貨日期」以查詢更多庫存和送貨詳細資訊。
單位 | 每單位 | 每管* |
|---|---|---|
| 50 - 50 | TWD50.70 | TWD2,535.00 |
| 100 - 200 | TWD43.00 | TWD2,150.00 |
| 250 - 450 | TWD42.20 | TWD2,110.00 |
| 500 - 950 | TWD41.30 | TWD2,065.00 |
| 1000 + | TWD40.50 | TWD2,025.00 |
* 參考價格
- RS庫存編號:
- 264-0626
- 製造零件編號:
- ISL33001IUZ
- 製造商:
- Renesas Electronics
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Logic Family | CMOS | |
| Product Type | Buffer | |
| Logic Function | Driver, Buffer | |
| Number of Channels | 2 | |
| Schmitt Trigger Input | No | |
| Input Type | Buffered | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2.3V | |
| Package Type | MSOP | |
| Pin Count | 8 | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | RoHS | |
| Series | ISL33001 | |
| Length | 7.8mm | |
| Height | 1.2mm | |
| Width | 4.4 mm | |
| Automotive Standard | No | |
| Supply Current | 4mA | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Logic Family CMOS | ||
Product Type Buffer | ||
Logic Function Driver, Buffer | ||
Number of Channels 2 | ||
Schmitt Trigger Input No | ||
Input Type Buffered | ||
Mount Type Surface | ||
Minimum Supply Voltage 2.3V | ||
Package Type MSOP | ||
Pin Count 8 | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals RoHS | ||
Series ISL33001 | ||
Length 7.8mm | ||
Height 1.2mm | ||
Width 4.4 mm | ||
Automotive Standard No | ||
Supply Current 4mA | ||
The Renesas Electronics buffers are 2 channel bus buffers that provide the buffering necessary to extend the bus capacitance beyond the 400pF maximum specified by the I2C specification. It consist of rise time accelerator circuitry to reduce power consumption from passive bus pull-up resistors and improve data-rate performance.
Bus capacitance buffering
Rise time accelerators
Hot swapping capability
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