暫時無法供應
我們無法確定此產品何時有貨，RS 預計將其從我們的產品目錄中移除。
- RS庫存編號:
- 198-8003
- 製造零件編號:
- CY7C1021D-10ZSXIT
- 製造商:
- Infineon
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
透過選取一個或多個屬性來查找類似產品。
選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Infineon | |
| Memory Size | 1024kB | |
| Product Type | SRAM | |
| Organisation | 64K x 16 bit | |
| Number of Words | 64K | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 10ns | |
| Address Bus Width | 16bit | |
| Maximum Clock Frequency | 1MHz | |
| Minimum Supply Voltage | 4.5V | |
| Timing Type | Asynchronous | |
| Mount Type | Surface | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Package Type | TSOP | |
| Pin Count | 44 | |
| Maximum Operating Temperature | 85°C | |
| Series | CY7C1021D | |
| Length | 18.51mm | |
| Standards/Approvals | No | |
| Height | 1.05mm | |
| Width | 10.26 mm | |
| Supply Current | 80mA | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Infineon | ||
Memory Size 1024kB | ||
Product Type SRAM | ||
Organisation 64K x 16 bit | ||
Number of Words 64K | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 10ns | ||
Address Bus Width 16bit | ||
Maximum Clock Frequency 1MHz | ||
Minimum Supply Voltage 4.5V | ||
Timing Type Asynchronous | ||
Mount Type Surface | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Package Type TSOP | ||
Pin Count 44 | ||
Maximum Operating Temperature 85°C | ||
Series CY7C1021D | ||
Length 18.51mm | ||
Standards/Approvals No | ||
Height 1.05mm | ||
Width 10.26 mm | ||
Supply Current 80mA | ||
Automotive Standard No | ||
The Cypress CY7C1021D is a high performance CMOS static RAM which has an automatic power down feature that significantly reduces power consumption when deselected. The Cypress CY7C1021D device is suitable for interfacing with processors that have TTL I/P levels and is not suitable for processors that require CMOS I/P levels.
Industrial Temperature Range: –40 °C to 85 °C
Automotive Temperature Range: –40 °C to 85 °C
CMOS for Optimum Speed and Power
Independent Control of Upper and Lower Bits