Alliance Memory Memory SRAM, CY62256NLL-55SNXI- 2 MB
- RS庫存編號:
- 286-350
- 製造零件編號:
- CY62256NLL-55SNXI
- 製造商:
- Alliance Memory
不可供應
RS 不再對此產品進貨。
- RS庫存編號:
- 286-350
- 製造零件編號:
- CY62256NLL-55SNXI
- 製造商:
- Alliance Memory
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Alliance Memory | |
| Product Type | Memory SRAM | |
| Memory Size | 2MB | |
| Organisation | 128k x 8 | |
| Number of Words | 128k | |
| Maximum Random Access Time | 55ns | |
| Timing Type | Asynchronous | |
| Minimum Supply Voltage | 4.5V | |
| Mount Type | Surface | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Package Type | SOP-28 | |
| Maximum Operating Temperature | 85°C | |
| Pin Count | 28 | |
| Series | CY62256NLL | |
| Standards/Approvals | RoHS | |
| Supply Current | 50mA | |
| Automotive Standard | No | |
| 選取全部 | ||
|---|---|---|
品牌 Alliance Memory | ||
Product Type Memory SRAM | ||
Memory Size 2MB | ||
Organisation 128k x 8 | ||
Number of Words 128k | ||
Maximum Random Access Time 55ns | ||
Timing Type Asynchronous | ||
Minimum Supply Voltage 4.5V | ||
Mount Type Surface | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Package Type SOP-28 | ||
Maximum Operating Temperature 85°C | ||
Pin Count 28 | ||
Series CY62256NLL | ||
Standards/Approvals RoHS | ||
Supply Current 50mA | ||
Automotive Standard No | ||
The Alliance Memory CMOS Static RAM is organized as 32K words by 8 bits. It offers easy memory expansion with active LOW chip enable (CE) and output enable (OE), featuring tristate drivers. The device includes an automatic power-down feature that reduces power consumption by 99.9% when deselected. An active LOW write enable signal controls the writing and reading operations. Data is written when CE and WE inputs are both LOW. For reading, the device is selected, and the outputs are enabled while WE remains HIGH. The input or output pins are in a high-impedance state unless the chip is selected, outputs are enabled, and WE is HIGH.
Easy memory expansion with CE and OE features
TTL compatible inputs and outputs
Automatic power down when deselected
CMOS for optimum speed and power
