Winbond W949D2DBJX5I Mobile LPDDR SDRAM 512 MB Surface, 90-Pin 32 bit VFBGA
- RS庫存編號:
- 188-2651
- 製造零件編號:
- W949D2DBJX5I
- 製造商:
- Winbond
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可享批量折扣
小計（1 包，共 5 件）*
TWD692.00
(不含稅)
TWD726.60
(含稅)
庫存資訊目前無法存取 - 請稍後再回來查看
單位 | 每單位 | 每包* |
|---|---|---|
| 5 - 55 | TWD138.40 | TWD692.00 |
| 60 + | TWD135.20 | TWD676.00 |
* 參考價格
- RS庫存編號:
- 188-2651
- 製造零件編號:
- W949D2DBJX5I
- 製造商:
- Winbond
規格
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Winbond | |
| Memory Size | 512MB | |
| Product Type | Mobile LPDDR SDRAM | |
| Data Bus Width | 32bit | |
| Address Bus Width | 15bit | |
| Maximum Clock Frequency | 200MHz | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 5ns | |
| Number of Words | 64M | |
| Mount Type | Surface | |
| Package Type | VFBGA | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 90 | |
| Maximum Operating Temperature | 85°C | |
| Series | W949D2DB | |
| Length | 13.1mm | |
| Height | 0.65mm | |
| Standards/Approvals | LVCMOS Compatible | |
| Minimum Supply Voltage | 1.7V | |
| Automotive Standard | No | |
| Maximum Supply Voltage | 1.95V | |
| 選取全部 | ||
|---|---|---|
品牌 Winbond | ||
Memory Size 512MB | ||
Product Type Mobile LPDDR SDRAM | ||
Data Bus Width 32bit | ||
Address Bus Width 15bit | ||
Maximum Clock Frequency 200MHz | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 5ns | ||
Number of Words 64M | ||
Mount Type Surface | ||
Package Type VFBGA | ||
Minimum Operating Temperature -40°C | ||
Pin Count 90 | ||
Maximum Operating Temperature 85°C | ||
Series W949D2DB | ||
Length 13.1mm | ||
Height 0.65mm | ||
Standards/Approvals LVCMOS Compatible | ||
Minimum Supply Voltage 1.7V | ||
Automotive Standard No | ||
Maximum Supply Voltage 1.95V | ||
VDD = 1.7∼1.95V
VDDQ = 1.7∼1.95V
Data width: x16 / x32
Clock rate: 200MHz (-5),166MHz (-6)
Standard Self Refresh Mode
Partial Array Self-Refresh(PASR)
Auto Temperature Compensated Self Refresh (ATCSR)
Power Down Mode
Deep Power Down Mode (DPD Mode)
Programmable output buffer driver strength
Four internal banks for concurrent operation
Data mask (DM) for write data
Clock Stop capability during idle periods
Auto Pre-charge option for each burst access
Double data rate for data output
Differential clock inputs (CK and CK)
Bidirectional, data strobe (DQS)
CAS Latency: 2 and 3
Burst Length: 2, 4, 8 and 16
Burst Type: Sequential or Interleave
8K refresh cycles/64 mS
Interface: LVCMOS compatible
Support package:
60 balls VFBGA (x16)
90 balls VFBGA (x32)
Operating Temperature Range
Extended: -25°C ≤ TCASE ≤ 85°C
Industrial: -40°C ≤ TCASE ≤ 85°C
This is a 512Mb Low Power DDR SDRAM organized as 2M words x 4 banks x 32bits.
Burst Type: Sequential or Interleave
Standard Self Refresh Mode
PASR, ATCSR, Power Down Mode、DPD
Programmable output buffer driver strength
Four internal banks for concurrent operation
Bidirectional, data strobe (DQS) is transmitted or received with data, to be used in capturing data at the receiver