Texas Instruments, 32 bit C28x, F2802x Microcontroller, 60 MHz, 64kB FLASH, 80-Pin LQFP
- RS庫存編號:
- 268-3642
- 製造零件編號:
- TMS320F28033PNT
- 製造商:
- Texas Instruments
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- RS庫存編號:
- 268-3642
- 製造零件編號:
- TMS320F28033PNT
- 製造商:
- Texas Instruments
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Texas Instruments | |
| Product Type | Microcontroller | |
| Series | F2802x | |
| Package Type | LQFP | |
| Mount Type | Surface | |
| Pin Count | 80 | |
| Device Core | C28x | |
| Data Bus Width | 32bit | |
| Program Memory Size | 64kB | |
| Maximum Clock Frequency | 60MHz | |
| RAM Size | 20kB | |
| Maximum Supply Voltage | 1.96V | |
| Number of Programmable I/Os | 45 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | RoHS Compliant | |
| Minimum Supply Voltage | 1.71V | |
| Instruction Set Architecture | Harvard | |
| ADCs | 16 bit | |
| Program Memory Type | FLASH | |
| Automotive Standard | AEC-Q100 | |
| 選取全部 | ||
|---|---|---|
品牌 Texas Instruments | ||
Product Type Microcontroller | ||
Series F2802x | ||
Package Type LQFP | ||
Mount Type Surface | ||
Pin Count 80 | ||
Device Core C28x | ||
Data Bus Width 32bit | ||
Program Memory Size 64kB | ||
Maximum Clock Frequency 60MHz | ||
RAM Size 20kB | ||
Maximum Supply Voltage 1.96V | ||
Number of Programmable I/Os 45 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals RoHS Compliant | ||
Minimum Supply Voltage 1.71V | ||
Instruction Set Architecture Harvard | ||
ADCs 16 bit | ||
Program Memory Type FLASH | ||
Automotive Standard AEC-Q100 | ||
The Texas Instruments microcontroller provide designers a high performance ARM Cortex M based architecture with a broad set of integration capabilities and a strong ecosystem of software and development tools. This microcontroller offer consumers compelling cost effective solutions by integrating application specific peripherals and providing a comprehensive library of software tools which minimize board costs and design cycle time. Offering quicker time to market and cost savings.
Harvard architecture characterized by separate buses for instruction and data
Efficient processor core system and memories
Hardware division and fast digital signal processing orientated multiply accumulate
Saturating arithmetic for signal processing
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