Renesas Electronics, 32 bit RXv2, RX231 Microcontroller, 54 MHz, 256kB FLASH, 48-Pin LQFP
- RS庫存編號:
- 262-7120P
- 製造零件編號:
- R5F52316CDFL#30
- 製造商:
- Renesas Electronics
此圖片僅供參考，請參閲產品詳細資訊及規格
可享批量折扣
小計 10 件 (以盤裝提供)*
TWD1,540.00
(不含稅)
TWD1,617.00
(含稅)
訂單超過 $1,300.00 免費送貨
最後的 RS 庫存
- 最終 500 個，準備發貨
單位 | 每單位 |
|---|---|
| 10 - 24 | TWD154.00 |
| 25 - 49 | TWD151.00 |
| 50 - 99 | TWD148.00 |
| 100 + | TWD126.00 |
* 參考價格
- RS庫存編號:
- 262-7120P
- 製造零件編號:
- R5F52316CDFL#30
- 製造商:
- Renesas Electronics
規格
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產品詳細資訊
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選取全部 | 屬性 | 值 |
|---|---|---|
| 品牌 | Renesas Electronics | |
| Series | RX231 | |
| Product Type | Microcontroller | |
| Package Type | LQFP | |
| Mount Type | Surface | |
| Pin Count | 48 | |
| Device Core | RXv2 | |
| Data Bus Width | 32bit | |
| Program Memory Size | 256kB | |
| Maximum Clock Frequency | 54MHz | |
| RAM Size | 32kB | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| DACs | 12 bit | |
| Maximum Operating Temperature | 85°C | |
| Width | 7 mm | |
| Standards/Approvals | RoHS | |
| Length | 7mm | |
| Height | 1.7mm | |
| Minimum Supply Voltage | 1.8V | |
| Program Memory Type | FLASH | |
| ADCs | 8 x 12 Bit | |
| Automotive Standard | No | |
| Instruction Set Architecture | CISC | |
| Number of Timers | 2 | |
| 選取全部 | ||
|---|---|---|
品牌 Renesas Electronics | ||
Series RX231 | ||
Product Type Microcontroller | ||
Package Type LQFP | ||
Mount Type Surface | ||
Pin Count 48 | ||
Device Core RXv2 | ||
Data Bus Width 32bit | ||
Program Memory Size 256kB | ||
Maximum Clock Frequency 54MHz | ||
RAM Size 32kB | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
DACs 12 bit | ||
Maximum Operating Temperature 85°C | ||
Width 7 mm | ||
Standards/Approvals RoHS | ||
Length 7mm | ||
Height 1.7mm | ||
Minimum Supply Voltage 1.8V | ||
Program Memory Type FLASH | ||
ADCs 8 x 12 Bit | ||
Automotive Standard No | ||
Instruction Set Architecture CISC | ||
Number of Timers 2 | ||
- COO (Country of Origin):
- CN
The Renesas Electronics RX231 Group of devices leverages an optimal combination of a 32-bit RXv2 CPU core with improved DSP/FPU and low-power consumption technology to realize extreme power efficiency. High-performance digital filtering, floating-point op
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
On-chip debugging circuit
Memory protection unit (MPU) supported