- RS庫存編號:
- 216-6213
- 製造零件編號:
- 854S006AGILF
- 製造商:
- Renesas Electronics
62 現貨庫存,可於6工作日發貨。
已增加
單價(不含稅) 毎管:62 個
TWD573.60
(不含稅)
TWD602.28
(含稅)
單位 | Per unit | Per Tube* |
62 - 248 | TWD573.60 | TWD35,563.20 |
310 + | TWD516.30 | TWD32,010.60 |
* 參考價格 |
- RS庫存編號:
- 216-6213
- 製造零件編號:
- 854S006AGILF
- 製造商:
- Renesas Electronics
產品概覽和技術數據資料表
法例與合規
產品詳細資訊
The Renesas Electronics 854S006 is a low skew, high performance 1-to-6, Differential-to-LVDS fanout buffer. The CLK, nCLK pair can accept most standard differential input levels. The 854S006 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 854S006 ideal for those clock distribution applications demanding well defined performance and repeatability.
Six differential LVDS outputs
One differential clock input pair
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1.7GHz
Translates any single-ended input signal to LVDS levels with
resistor bias on nCLK input
Output Skew: 55ps (maximum)
Propagation delay: 850ps (maximum)
Additive phase jitter, RMS: 0.067ps (typical)
Full 3.3V or 2.5V supply
-40°C to 85°C ambient operating temperature
One differential clock input pair
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1.7GHz
Translates any single-ended input signal to LVDS levels with
resistor bias on nCLK input
Output Skew: 55ps (maximum)
Propagation delay: 850ps (maximum)
Additive phase jitter, RMS: 0.067ps (typical)
Full 3.3V or 2.5V supply
-40°C to 85°C ambient operating temperature
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.